Structural Integrity
Durability characteristic of small diameter vertical interconnects determines the ability of a high density board to withstand thermal and mechanical stress. Achieving high microvia reliability requires a robust bond between the copper plating and the target landing pad. Failure often occurs at the interface between the via base and the pad during thermal cycling.
Stress Factor
Coefficient of thermal expansion mismatch between the copper and the dielectric resin puts the small via under tension during reflow. Maintaining microvia reliability is particularly difficult in stacked via configurations where the stress is concentrated through multiple layers. Voids in the plating or residues left from the laser drilling process significantly weaken these connections.
High aspect ratio vias are more prone to cracking than shallower structures.
Testing Verification
Interconnect stress testing or thermal shock cycling is used to validate the performance of these features under accelerated aging conditions. Consistent microvia reliability is confirmed when the electrical resistance of a test chain remains within a small percentage of its initial value. Advanced cross sectioning techniques allow engineers to inspect the grain structure of the plated copper for defects.
A reliable microvia must maintain electrical continuity throughout the entire operational life of the electronic device.